The present invention relates to liquid crystal drivers for driving a liquid crystal panel (liquid crystal display section) and liquid crystal displays including the driver, in particular to liquid crystal drivers that are small in size and low in power consumption and liquid crystal displays including the driver.
Referring to FIG. 9, a block diagram is shown depicting a thin film transistor (TFT) liquid crystal display, which is a typical example of active matrix liquid crystal displays.
The liquid crystal display includes a liquid crystal display section and a liquid crystal driver driving the display section. The liquid crystal display section is made based on a TFT liquid crystal panel 901 in which there are provided a liquid crystal display element (not shown) and an opposite electrode (common electrode) 906.
Meanwhile, the liquid crystal driver is formed by IC-based source drivers 902, IC-based gate drivers 903, a controller 904, and a liquid crystal power supply 905.
Each of the source drivers 902 and the gate drivers 903 is typically fabricated from an IC (Integrated Circuit) chip placed on a wired film, such as a tape carrier package (TCP). The mounting of the IC chip on a liquid crystal panel is done by connecting the IC chip to the ITO (Indium Tin Oxide) terminals of the liquid crystal panel or by direct thermocompression of the IC chip to the ITO terminals with an intervening anisotropic conductive film (ACF).
In some cases, the controller 904, liquid crystal power supply 905, source drivers 902, and gate drivers 903 are entirely or partly integrated on a single chip to fit in a reduced size of the liquid crystal display. FIG. 9 shows these components individually according to their functions.
The controller 904 supplies digitized display data (for example, RGB signals corresponding to red, green, and blue) and various control signals to the source drivers 902 and gate drivers 903. Major control signals supplied to the source drivers 902 include a horizontal synchronizing signal, a start pulse signal, and a source driver clock signal which are indicated as S1 in the diagram. Major control signals supplied to the gate drivers 903 include a vertical synchronizing signal and a gate driver clock signal which are indicated as S2 in the diagram. The power source to drive the ICs are omitted in the diagram.
The liquid crystal power supply 905 supplies a liquid crystal panel display voltage (more specifically, in the present invention, a reference voltage from which tone display voltages are produced) to the source drivers 902 and gate drivers 903.
The controller 904, receiving the display data from a member not shown in the diagram, transmits the data to the source drivers 902 in the form of a digital signal as the display data D. Each source driver 902 latches the incoming digital display data serially and subsequently converts the latched data from digital to analog based on the incoming horizontal synchronizing signal (alternatively referred to as latch signal Ls as shown in FIG. 13). The source driver 902 then supplies the D/A converted data, i.e., the analog voltage for tone displays (tone display voltage), from its liquid crystal drive voltage output terminal over a later-detailed source signal line 1004 to an associated liquid crystal display element (not shown) in the liquid crystal panel 901.
Now, the liquid crystal panel 901 will be described. FIG. 10 shows the structure of the liquid crystal panel 901. The liquid crystal panel 901 is provided with pixel electrodes 1001, pixel capacitors 1002, TFTs 1003 for turning on/off the application of voltages to the respective pixels, source signal lines 1004, gate signal lines 1005, and an opposite electrode 1006 (an equivalent to the opposite electrode 906 in FIG. 9). In the figure, the region identified as xe2x80x9cAxe2x80x9d encloses liquid crystal display elements for one pixel.
The source signal lines 1004 are fed from the source drivers 902 with tone display voltages according to the brightness of the pixels required for a display. The gate signal lines 1005 are fed from the gate drivers 903 with scan signals to sequentially turn on the TFTs 1003 row by row. As the scan signal turns on the TFT 1003, permitting a voltage to be applied through the source signal line 1004 to the pixel electrode 1001 connected to the drain of the TFT 1003, the pixel capacitor 1002 between the pixel electrode 1001 and the opposite electrode 1006 is charged. This changes the transmittance of the liquid crystal to visible light, effecting a display.
FIGS. 11 and 12 show an example of a liquid crystal drive waveform. In the figures, 1101 and 1201 identify a drive signal output from the source driver 902; 1102 and 1202 a drive signal output from the gate driver 903; 1103 and 1203 the potential of the opposite electrode 1006; and 1104 and 1204 the potential of the pixel electrode 1001. The voltage across the liquid crystal material is equal to the potential difference between the pixel electrode 1001 and the opposite electrode 1006, which is shown by slant lines in the figure.
For example, in FIG. 11, the TFT 1003 is on when the drive signal output 1102 from the gate driver 903 is high, causing the difference between the drive signal output 1101 from the source driver 902 and the potential 1103 of the opposite electrode 1006 to be applied to the pixel electrode 1001. The drive signal output 1102 from the gate driver 903 subsequently goes LOW. This turns off the TFT 1003, but does not change the foregoing voltage applied to the pixel due to the provision of the pixel capacitor 1002. The same description holds true with the case of FIG. 12.
FIGS. 11 and 12 show cases of different voltages being applied to the liquid crystal material. A higher voltage is applied in the case of FIG. 11 than in the case of FIG. 12. The voltage across the liquid crystal, when varied in an analog manner as above, causes the transmittance of the liquid crystal to light to vary in an analog manner; a tone display is thus produced. The number of displayed tones is determined by the number of analog voltages available for application to the liquid crystal.
The present invention is directed to standard voltage generator circuits and output circuits for use in tone display circuits that are very large in size and very high in power consumption. For these reasons, the following will describe the liquid crystal driver with a focus on the source drivers 902.
FIG. 13 is a block diagram of the source drivers 902. Description will be made below about major components only. Digital display data sets DR, DG, DB (for example, 6 bits), as transmitted from the controller 904, are temporarily latched by an input latch circuit 1301. The digital display data sets DR, DG, DB correspond to red, green, and blue respectively.
Meanwhile, a start pulse signal SP is shifted through a shift register circuit 1302 in synchronism with the clock signal CK and appears at the last stage of the shift register circuit 1302, from which the start pulse signal SP (cascade output signal S) is supplied to a next source driver.
The digital display data sets DR, DG, DB latched by the input latch circuit 1301 are temporarily stored serially in the sampling memory circuit 1303 in synchronism with output signals from a number of stages of the shift register circuit 1302 and transmitted to a hold memory circuit 1304 in the next stage.
As display data for one horizontal synchronization period is stored in the sampling memory circuit 1303, the hold memory circuit 1304 acquires an output signal from the sampling memory circuit 1303 based on the horizontal synchronizing signal (latch signal Ls) to supply to a level shifter circuit 1305 in the next stage and to retain the display data until an input of a succeeding horizontal synchronizing signal.
The level shifter circuit 1305 boosts or otherwise changes a signal level so that the signal is suitable to a D/A converter circuit 1306, in the next stage, which processes the level of a voltage applied to the liquid crystal panel. The standard voltage generator circuit 1309 produces analog voltages from a reference voltage VR fed from the aforementioned liquid crystal power supply 905 (see FIG. 9) for outputs to the D/A converter circuit 1306 to effect a tone display.
The D/A converter circuit 1306 chooses, from the analog voltages supplied from the standard voltage generator circuit 1309, an analog voltage suitable to the display data of which the level is shifted by the level shifter circuit 1305. The analog voltage representative of a display tone is transmitted to an output circuit 1307 from which the analog voltage leaves through liquid crystal drive voltage output terminals (hereinafter, output terminals) 1308 for source signal lines in the liquid crystal panel 901. The output circuit 1307 is basically a buffer circuit and is formed by, for example, a voltage follower circuit including a differential amplifier circuit.
Now, the standard voltage generator circuit 1309 and the D/A converter circuit 1306, which are the core of the present invention, will be described in more detail in terms of their circuit structure.
FIG. 14 shows, as an example, a circuit structure of the standard voltage generator circuit 1309. When each R, G, B digital display data set consists of, for example, 6 bits, the standard voltage generator circuit 1309 produces 64 analog voltages that correspond to 26 (=64) display tones for output. The structure is now described more specifically.
The standard voltage generator circuit 1309 includes a resistance divider circuit formed by resistors R0-R7 connected in series, a very simple configuration. Each resistor R0-R7 is formed by eight resistor elements connected in series: for example, referring to FIG. 15, the resistor R0 is formed by eight resistor elements R01, R02, . . . and R08 connected in series. The remaining resistors R1-R7 have an identical configuration to the resistor R0. So, the standard voltage generator circuit 1309 as a whole includes 64 resistor elements connected in series.
The standard voltage generator circuit 1309 has nine halftone voltage input terminals corresponding to the nine reference voltages Vxe2x80x20, Vxe2x80x28, . . . , Vxe2x80x256, and Vxe2x80x264. The resistor R0 is connected at an end thereof to a halftone voltage input terminal for to the reference voltage Vxe2x80x264 and at the other end, i.e., the contact of the resistors R0 and R1, to a halftone voltage input terminal for the reference voltage Vxe2x80x256. Likewise, the contacts of the adjacent resistors R1 and R2, R2 and R3, . . . , R6 and R7 are connected to respective halftone voltage input terminals corresponding to the reference voltages Vxe2x80x248, Vxe2x80x240, . . . Vxe2x80x28. A halftone voltage input terminal for the reference voltage Vxe2x80x20 is connected to one of the ends of the resistor R7 at which the resistor R6 is not connected.
The configuration enables voltages V1-V63 to be picked up at the contacts between the 64 resistor elements. The voltages V1-V63, plus a voltage V0 coming straight from the reference voltage Vxe2x80x20, provide 64 different analog voltages (V0-V63) for a tone display. In short, if the standard voltage generator circuit 1309 is formed by the resistance divider circuit, the resistance ratios determines the analog voltages V0-V63 for use to produce a tone display. The 64 analog voltages V0-V63 are fed from the standard voltage generator circuit 1309 to the D/A converter circuit 1306.
Typically, the two reference voltages Vxe2x80x20 and Vxe2x80x264 derived at the ends are always coupled to the halftone voltage input terminals. The seven halftone voltage input terminals for the remaining voltages Vxe2x80x28-Vxe2x80x256 are used for fine adjustment and may in some cases receive no voltages at all.
Now, the D/A converter circuit 1306 will be described. FIG. 16 shows the structure of the D/A converter circuit 1306 as an example. In the figure, 1307 is the structure (voltage follower circuit) of the output circuit described above.
MOS transistors and transmission gates are arranged as analog switches in the D/A converter circuit 1306 so that one of the 64 input voltages V0-V63 is selected for output according to display data represented by a 6-bit digital signal, that is, the switches are turned on/off according to the display data (Bit 0 to Bit 5) represented by a 6-bit digital signal. As a result, a voltage is selected from the 64 input voltages for an output to the output circuit 1307. The process will be described in more detail below.
The 6-bit digital signal gives Bit 0 as the least significant bit (LSB) and Bit 5 as the most significant bit (MSB). The switches are arranged in pairs. 32 pairs of switches (or 64 switches) correspond to Bit 0 and 16 pairs of switches (or 32 switches) correspond to Bit 1. The number of (pairs of) switches halves for each subsequent bit. That leaves a single pair of switches (or two switch) corresponding to Bit 5. Thus, the D/A converter circuit 1306 includes 25+24+23+22+21+1=63 pairs of switches (or 126 switches).
An end of each switch for Bit 0 has a terminal to which one of the voltages V0-V63 is coupled. The other end is connected to an end of another switch, and the two ends are both connected together to an end of a switch for next Bit 1. The same arrangement is repeated for every switch corresponding to Bit 0 to Bit 5. That leaves a single line extended from the switch corresponding to Bit 5 and connected to the output circuit 1307.
The switches for Bit 0 to Bit 5 will be referred to as switch groups SW0 to SW5. The switches in the switch groups SW0 to SW5 are controlled by 6-bit digital display data (Bit 0 to Bit 5) as will be described in the following.
The switch groups SW0 to SW5 behave so that one of the paired analog switches (the lower one of the paired switches in the diagram) is on when the corresponding bit is 0 (LOW) and the other of the paired analog switches (the upper one in the diagram) is on when the corresponding bit is 1 (HIGH). The diagram shows Bit 0 to Bit 5 (111111): the upper switch of every pair is on and the lower switch is off. In this situation, the D/A converter circuit 1306 supplies the voltage V63 to the output circuit 1307.
Likewise, for example, when Bit 5 to Bit 0 are (111110), (000001), and (000000), the D/A converter circuit 1306 supplies the voltages V62, V1, and V0 respectively to the output circuit 1307. A voltage is selected in this manner from the tone display analog voltages V0-V63 in accordance with a digital display to produce a tone display.
Typically, each source driver IC includes only one standard voltage generator circuit 1309 for common use among the output terminals 1308. A D/A converter circuit 1306 and an output circuit 1307 are however provided to each output terminal 1308.
To produce a color display, different colors require different sets of output terminals 1308. In that situation, a D/A converter circuit 1306 and an output circuit 1307 are provided to each pixel and each color. In other words, suppose that the liquid crystal panel 901 has N pixels along the width, the liquid crystal panel 901 requires N output terminals 1308 for each color and hence includes 3N D/A converter circuits 1306 and 3N output circuits 1307 in all. The output terminals 1308 are denoted as R1, G1, B1; R2, G2, B2; . . . and; RN, GN, BN, where R, G, B stand for red, green, and blue, and the subscript n (n=1, 2, . . . , N) denotes each pixel.
In practical use, to produce a naturally looking tone image on a liquid crystal display, a gamma correction is carried out for adjustment of light transmission characteristics of the liquid crystal material in consideration of human vision. The gamma correction is implemented by the standard voltage generator circuit 1309 producing various tone display analog voltages through unequal division of the internal resistance, not through equal division thereof.
FIG. 17 shows the relationship between tone display data (digital display data) and a liquid crystal drive output voltage (tone display analog voltage) with gamma correction applied. As is observable in the figure, the tone display analog voltage is adapted so that the relationship thereof with digital display data is represented by a zigzag line.
To actually impart such properties to the tone display analog voltage, in the standard voltage generator circuit 1309 of FIG. 14, the resistors R0-R7 are adapted to exhibit such resistance values that can effect the gamma correction and each resistor R0-R7 is divided to eight elements with an identical resistance. In other words, the eight resistor elements R01, R02, . . . R08 connected in series (collectively termed xe2x80x9cthe resistor R0xe2x80x9d) have an identical resistance, and the resistors R0, R1, . . . R7, each of which is formed by eight series resistor elements, have a ratio of resistances that can effect the gamma correction. The gamma correction is effected this way.
The description above is made about drivers to produce a tone image on a TFT liquid crystal display.
Incidentally, research and development on liquid crystal displays were conventionally centered around demands to increase the screen size for application to television sets, computer displays, and the like. Conversely, today""s demands are shifting to liquid crystal displays and liquid crystal drivers suited for application to portable displays in portable phones and other like devices that are creating a rapidly growing market.
The screen size suitable for adoption in portable devices is basically small. Accordingly, it is strongly required that the liquid crystal display and driver be small, lightweight, and energy efficient (because they rely on battery for operational power), and inexpensive.
Circuitry to produce the aforementioned, conventional tone display works in the following manner: A standard voltage generator circuit formed by resistor circuits connected in series generates number of analog voltages for output. The outputs are coupled to a D/A converter circuit including analog switch circuits where the analog switches select one of the incoming voltages according to digital display data. The output circuit (voltage follower circuit) then transmits the selected analog voltage as a tone display liquid crystal drive voltage. Among these components, the voltage follower circuit occupies a large portion of the circuit area and consumes a lot of electric power, because the circuit is an analog circuit including a differential amplifier circuit.
In a conventional display for large screens, source signal lines and pixels of the liquid crystal panel have large load capacity. A voltage follower circuit and other buffer circuits were therefore essential as part of an output circuit to charge and discharge the pixel and the source signal line capacitor and provide a predetermined drive voltage free from waveform distortion (rounding). For these reasons, each output terminal is provided with its own voltage follower circuit despite large current consumption.
The display of a portable device has a small screen size and pixel area, which does not require strict specifications on resolution. Therefore, medium to small size liquid crystal displays with about 560xc3x97240 pixels are often used, so the pixel and the source signal line have a small load capacity. This indicates that the output stage no longer must have much driving capability.
For these reasons, the highly current-consuming output circuit (voltage follower circuit) is omitted in the display for use in portable devices. Under these conditions, a standard voltage generator circuit formed by resistor circuits connected in series generates a number of analog voltages for output. The outputs are coupled to a D/A converter circuit including analog switch circuits where the analog switches select one of the incoming voltages according to digital display data and directly transmit the selected analog voltage as a tone display liquid crystal drive voltage.
A problem arises from the fact that tone display analog voltages are supplied to the liquid crystal panel through resistors in the standard voltage generator circuit. A downside of this technique is that the liquid crystal drive voltage waveform is rounded at rises and falls, because of charging/discharging of the pixel and source signal line capacitor of the liquid crystal panel.
The present invention, in view of the foregoing problems, has an objective to offer a liquid crystal driver capable of preventing distortion of a drive waveform without providing an output circuit in each output terminal to the liquid crystal panel and thus reducing the size of the liquid crystal display sufficiently for use in a compact, low power consuming portable devices, and also to offer a liquid crystal display including such a liquid crystal driver.
In order to achieve the objective, a liquid crystal driver in accordance with the present invention is a liquid crystal driver including:
standard voltage producing means for producing 2n tone display voltages from incoming first reference voltages in accordance with n-bit display data; and
selecting means for selecting a voltage from the 2n tone display voltages in accordance with incoming display data, for transmission to a liquid crystal panel through a plurality of output terminals with no further processing, and
is characterized in that the standard voltage producing means includes:
generation means for generating a second reference voltage from adjacent two of the first reference voltages arranged in ascending or descending order, the second reference voltage having an intermediate level between those of the adjacent first reference voltages;
buffer means for impedance-converting the second reference voltage for output; and
voltage dividing means for producing a voltage having an intermediate level between those of the adjacent first reference voltages and of adjacent ones of the first and second reference voltages by voltage division, so as to produce the 2n tone display voltages.
By adopting this arrangement, the selecting means selects, in accordance with incoming display data, a voltage from the 2n tone display voltage produced by the standard voltage producing means, for transmission to the liquid crystal panel through a plurality of output terminals with no further processing.
Here, in the standard voltage producing means, the generation means generates a second reference voltage from adjacent two of the incoming first reference voltages arranged in ascending or descending order, the second reference voltage having an intermediate level between those of the adjacent first reference voltages. The second reference voltage is impedance-converted by the buffer means, and its waveform distortion is reduced as a result. The second reference voltage is supplied to the voltage dividing means with reduced waveform distortion. The voltage dividing means produces a voltage having an intermediate level between those of the adjacent first reference voltages and of adjacent ones of the first and second reference voltages by voltage division, so as to produce the 2n tone display voltages.
By disposing the buffer means in the preceding stage of the voltage dividing means, distortion is reduced in waveform of the voltage supplied to the voltage dividing means, and consequently, distortion is reduced in waveform of the tone display voltage outputs from the voltage dividing means. On account of this, display quality deterioration caused by output waveform distortion can be restrained even when the tone display voltages are supplied to the liquid crystal panel through the selecting means with no further processing. In other words, good display quality is ensured without providing, to each output terminal connected to the liquid crystal panel, an output circuit that occupies a large area and consumes large power as in a conventional example. Meanwhile, the buffer means provided to the standard voltage producing means is far smaller in layout area and power consumption than conventional configurations in which each output terminal has its own buffer means.
Therefore, with the structure, a small, energy efficient liquid crystal driver can be fabricated, and a small- to medium-sized liquid crystal display for use in small, energy efficient portable devices can be fabricated by applying the liquid crystal driver in the liquid crystal display.
In order to achieve the objective, a liquid crystal display in accordance with the present invention is characterized in that it includes the liquid crystal driver and a liquid crystal panel driven by the liquid crystal driver.
The forgoing liquid crystal driver is smaller and capable of running on lower power consumption, and still does not loose its good display quality. By arranging a liquid crystal display from the liquid crystal driver and the liquid crystal panel, for example, a small- to medium-sized liquid crystal display for use in small, energy efficient portable devices can be fabricated.
For a fuller understanding of the nature and advantages of the invention, reference should be made to the ensuing detailed description taken in conjunction with the accompanying drawings.